FW team leader

We’re looking for FPGA (FW logic design) Team leader to join our team and be responsible of FPGA team

:Main responsibilities

Managing FPGA team
Responsible of the team professional development and training
Responsible of the team design development processes
Hands-on FPGA development

:Requirements

B.Sc. in EE Engineering
At least 6 years FPGA designer with experience in synthesis, place and route and timing compliance
Proven experience of VHDL logic design principles along with timing, area and power implications
Experience with creation of complex designs including coding and integration of 3rd party IPs
Experience with verification methodologies, RTL and gate-level simulation
Experience with lab FPGA debugging methodologies such as ChipScope / SignalTap
Experience with lab debugging equipment like oscilloscopes and logic analyzers
Experience with common high-speed interfaces implementation
Experience with leading a design team or any other management experience
Experience with Xilinx and MicroSemi FPGAs & SoC-based designs is advantage
Experience with Xilinx and MicroSemi FPGA-embedded processors is advantage
Experience with video processing algorithms implementation is advantage
Experience with high-speed interfaces implementation such as: DDR3, DDR4, Ethernet, MIPI is advantage

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